/*
  Test des ST-Chips STP24DP05 mit 24 Kanδlen zur Ansteuerung einer RGB 8x8 Matrix
 05/2009 HS
 */

extern "C" {
#include <inttypes.h>
#include <avr/interrupt.h>
#include <avr/io.h> 
#include <wiring.h> 
} 

volatile int latchPin = 4;
volatile int clockPin = 3;
volatile int dataPin = 2;

volatile int rowlatchPin = 5;
volatile int rowclockPin = 6;
volatile int rowdataPin = 7;

// RGB-Matrix: 2 Bytes je Pixel, aufgeteilt in Halbbytes 0R:GB, also 0b00001111:0b00000000 fόr ein rotes Pixel mit voller Helligkeit

volatile unsigned int matrix[8][8] = { 
  {
    0, 0, 0, 0, 0, 0, 0, 0                             }
  ,{
    0, 0, 0, 0, 0, 0, 0, 0                             }
  ,{
    0, 0, 0, 0, 0, 0, 0, 0                             }
  ,{
    0, 0, 0, 0, 0, 0, 0, 0                             }
  ,{
    0, 0, 0, 0, 0, 0, 0, 0                             }
  ,{
    0, 0, 0, 0, 0, 0, 0, 0                             }
  ,{
    0, 0, 0, 0, 0, 0, 0, 0                             }
  ,{
    0, 0, 0, 0, 0, 0, 0, 0                             }
};

volatile int c, row, sw;
volatile int bright[8] = {
  0,0,0,0,0,0,0,0 };

void setup() {
  byte i;

  pinMode(latchPin, OUTPUT);
  pinMode(dataPin, OUTPUT);
  pinMode(clockPin, OUTPUT);

  pinMode(rowlatchPin, OUTPUT);
  pinMode(rowclockPin, OUTPUT);
  pinMode(rowdataPin, OUTPUT);

  // alles ausschalten
  digitalWrite(latchPin, LOW);
  shiftOut(dataPin, clockPin, MSBFIRST, 0);   
  digitalWrite(latchPin, HIGH);

  digitalWrite(rowlatchPin, LOW);
  shiftOut(rowdataPin, rowclockPin, MSBFIRST, 1);
  digitalWrite(rowlatchPin, HIGH);

  /*
  TCCR2A – Timer/Counter Control Register A:
   Bit     7       6       5       4       3  2  1      0
   (0xB0)  COM2A1  COM2A0  COM2B1  COM2B0  –  –  WGM21  WGM20
   */
  TCCR2A &= ~((1 << COM2A1) | (1 << COM2A0));  // normal port operation, OC0A disconnected
  TCCR2A &= ~((1 << COM2B1) | (1 << COM2B0));  // normal port operation, OC0B disconnected
  TCCR2A &= ~((1 << WGM21) | (1 << WGM20));    // turn off WGM21 and WGM20 bits, Timer counts from 0 to 255, generates TOV IRQ at 255

  /*
  TCCR2B – Timer/Counter Control Register B:
   Bit     7       6       5   4  3      2     1     0
   (0xB1)  FOC2A   FOC2B   –   –  WGM22  CS22  CS21  CS20
   
   Clock Select Bit:
   CS22 CS21 CS20 Description
   0    0    0    No clock source (Timer/Counter stopped).
   0    0    1    clkT2S/(No prescaling)
   0    1    0    clkT2S/8 (From prescaler)
   0    1    1    clkT2S/32 (From prescaler)
   1    0    0    clkT2S/64 (From prescaler)
   1    0    1    clkT2S/128 (From prescaler)
   1    1    0    clkT2S/256 (From prescaler)
   1    1    1    clkT2S/1024 (From prescaler
   */
  TCCR2B &= ~(1 << WGM22);                    // turn off WGM22  
    TCCR2B &= ~((1 << CS22) | (1 << CS20));    
    TCCR2B |= (1 << CS21);                        // Timer2 = Timer Prescaler /8
//  TCCR2B &= ~(1 << CS20);                        // Timer2 = Timer Prescaler /256
//  TCCR2B |= ((1 << CS21) | (1 << CS22));    



  /*
  ASSR – Asynchronous Status Register
   
   Bit 5 – AS2: Asynchronous Timer/Counter2
   When AS2 is written to zero, Timer/Counter2 is clocked from the I/O clock, clkI/O. When AS2 is
   written to one, Timer/Counter2 is clocked from a crystal Oscillator connected to the Timer Oscillator
   1 (TOSC1) pin. When the value of AS2 is changed, the contents of TCNT2, OCR2A,
   OCR2B, TCCR2A and TCCR2B might be corrupted.
   */
  ASSR &= ~(1 << AS2);

  /*
  TIMSK2 – Timer/Counter2 Interrupt Mask Register
   Bit    2      1      0
   OCIE2B OCIE2A TOIE2
   
   Bit 0 – TOIE2: Timer/Counter2 Overflow Interrupt Enable
   When the TOIE2 bit is written to one and the I-bit in the Status Register is set (one), the
   Timer/Counter2 Overflow interrupt is enabled. The corresponding interrupt is executed if an
   overflow in Timer/Counter2 occurs, i.e., when the TOV2 bit is set in the Timer/Counter2 Interrupt
   Flag Register – TIFR2.
   */
  TIMSK2 = (1 << TOIE2);    // Timer 2 Overflow Interrupt Enable

  TCNT2 = 0; // Timer Reset              

  row = 0;
  sw = 0;
  c = 1;
  randomSeed(42);
  sei();

}


void loop() {
  int j;

  for (j = 0; j < 8; j++) {
    bright[j]=16;
    delay (80);
  }
  for (j = 0; j < 8; j++) {
    bright[j]=0;
    delay (80);
  }
}


//------------------------------------------------------------
// Interrupt-Service-Routine
// Aruino runs at 16 Mhz, so we have 1000 Overflows per second...
// 1/ ((16000000 / 64) / 256) = 1 / 1000
// jetzt 16000000 / 8 / 256 = 1/8000
//
ISR(TIMER2_OVF_vect) {
  int b, i, value, r;

  TCNT2 = 0; //Timer Reset

  // Zeile ausschalten
    digitalWrite(rowlatchPin, LOW);
  shiftOut(rowdataPin, rowclockPin, MSBFIRST, 0);
  digitalWrite(rowlatchPin, HIGH);

  if (c++ >= 15) {
    c = 1;
  }

  value = 0;
  /*  if (c < bright[0]) { 
   value |= 1;
   }
   if (c < bright[1]) { 
   value |= 2;
   }
   if (c < bright[2]) { 
   value |= 4;
   }
   if (c < bright[3]) { 
   value |= 8;
   }
   if (c < bright[4]) { 
   value |= 16;
   }
   */  if (c < bright[5]) { 
    value |=32;
  }
  if (c < bright[6]) { 
    value |= 64;
  }
  if (c < bright[7]) { 
    value |= 128;
  }

  digitalWrite(latchPin, LOW);

  if (true) {
    shiftOut(dataPin, clockPin, MSBFIRST, value);       // red
  } 
  else {     
    shiftOut(dataPin, clockPin, MSBFIRST, 0);       // red
  } 

  if (true) {
    shiftOut(dataPin, clockPin, MSBFIRST, value);       // green
  } 
  else {     
    shiftOut(dataPin, clockPin, MSBFIRST, 0);       // green
  } 

  if (false) {
    shiftOut(dataPin, clockPin, MSBFIRST, 0);       // blue
  }   
  else {     
    shiftOut(dataPin, clockPin, MSBFIRST, 0);       // blue
  } 

  digitalWrite(latchPin, HIGH);

  // Zeile einschalten
  digitalWrite(rowlatchPin, LOW);
  shiftOut(rowdataPin, rowclockPin, MSBFIRST, 1 << row);
  digitalWrite(rowlatchPin, HIGH);

  if (row++ >= 7) { 
    row = 0; 
  }

};